;/*****************************************************************************
;*  Copyright Statement:
;*  --------------------
;*  This software is protected by Copyright and the information contained
;*  herein is confidential. The software may not be copied and the information
;*  contained herein may not be used or disclosed except with the written
;*  permission of MediaTek Inc. (C) 2007
;*
;*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
;*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
;*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
;*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
;*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
;*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
;*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
;*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
;*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
;*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
;*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
;*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
;*
;*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
;*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
;*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
;*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
;*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
;*
;*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
;*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
;*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
;*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
;*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
;*
;*****************************************************************************/
;
;/*****************************************************************************
; *
; * Filename:
; * ---------
; *   scatA35X_BB.txt
; *
; * Project:
; * --------
; *   Maui_Software
; *
; * Description:
; * ------------
; *   defines the memory map for the validation board
; *
; * Author:
; * -------
; *   system auto generator v2.60
; *
; * Auto Generated Date:
; * -------
; *   2011/4/8
; *
; * Revision History:
; * -------
; * $Log: scatA35X_BB.txt system auto generator v2.60 $
; * 
; ****************************************************************************/
;
;=========================================================================
; This scatter file is auto-generated and please DO NOT change the content at will
;=========================================================================
;
;--------------------
; SCHEME   : external 14MB flash memory and 4MB SRAM
; PLATFORM : MT6253
; FEATURES : 
;--------------------

ROM 0x00000000 0x00e00000
{
    ROM 0x00000000 0x00400000
    {
         bootarm.obj (C$$code,+First)
         *.obj (LEADING_PART,+First)
         *.obj (SECOND_PART,+First)
         
         
         Regioninit_ads.obj (+RO-CODE)
         *l1_classb_g2.lib (+RO-CODE)
         *l1_g2.lib (+RO-CODE)
         *l1_classb_umts.lib (+RO-CODE)
         *l4_classb.lib (+RO-CODE)
         *l4misc.lib (+RO-CODE)
         *lcmmi.lib (+RO-CODE)
         *mmi_framework.lib (+RO-CODE)
         *mmi_app.lib (+RO-CODE)
         *conn_app.lib (+RO-CODE)
         *inet_app.lib (+RO-CODE)
         
         cpp_initialise.o(+RO)
         cpp_finalise.o(+RO)
         * (C$$pi_ctorvec)
         * (C$$pi_dtorvec)
         * (C$$ddtorvec)
         
         divrt_real.o (+RO-CODE)
         *f_t_p.l (+RO-CODE)
         
; moved from ITCM
         tct.obj (+RO)
    }
    ROM2 +0x0 0x00400000
    {
; WAP family
         *wapadp.lib (+RO-CODE)
         *wap.lib (+RO-CODE)
         *wae.lib (+RO-CODE)
         *jataayu.lib (+RO-CODE)
         *jataayuapp.lib (+RO-CODE)
         *wapapp.lib (+RO-CODE)
         *obigo05aadp.lib (+RO-CODE)
         *obigo05alib.lib (+RO-CODE)
         *obigo03capp.lib (+RO-CODE)
         *obigo03cadp.lib (+RO-CODE)
         *obigo03clib.lib (+RO-CODE)
; J2ME family
         *j2me_11.lib (+RO-CODE)
         *j2me_11_rvct.lib (+RO-CODE)
         *j2me_hi.lib (+RO-CODE)
         *j2me_hi_rvct.lib (+RO-CODE)
         *jal.lib (+RO-CODE)
         *ijet_adp.lib (+RO-CODE)
         *jblendia.lib (+RO-CODE)
         j2me_custom_*.obj (+RO-CODE)
    }
    ROM3 +0x0 0x00400000
    {
         .ANY (+RO-CODE)
    }
    ROM4 +0x0 0x00400000
    {
         .ANY (+RO-CODE)
    }
    ROM5 +0x0 
    {
         .ANY (+RO-DATA)
    }
; For __MIIPTS_LOADER__ 重叠
    EXTSRAM_LARGEPOOL_NORMAL 0x08000000
;    EXTSRAM_LARGEPOOL_NORMAL 0x08000000 OVERLAY
    {
; For MT6225 projects, app-based ASM always at first due to Java FBBR
         app_mem.obj (LARGEPOOL_FIRST_ZI)
         ScrMemMgr.obj (LARGEPOOL_ZI)
         j2me_custom_resource.obj (LARGEPOOL_ZI)
;         med_main.obj (LARGEPOOL_ZI)
    }
; For __MIIPTS_LOADER__ start
; 要把这个配置放在0x08000000为起始的第一个, 且和app_mem.obj (LARGEPOOL_FIRST_ZI)重叠
;    EXTSRAM_MIIPTSPOOL_NORMAL 0x08000000 OVERLAY 0x5000
;    {                
;         *.obj (MIIPTS_POOL_FIRST_ZI)
;    }
; For __MIIPTS_LOADER__ end  

    EXTSRAM +0x00 
    {
         * (+RW, +ZI)
    }
    ;antony@2010.5.25:  moved out to eay calculate med_ext_mem
    MED_EXT_MEM +0x00 
    {
         med_main.obj (LARGEPOOL_ZI) 
    }
    
        MRSRAM 0x083dc000 OVERLAY 0x20000
    {
	mmidsm.obj(LARGEPOOL_ZI)
    }
; DSP execution regions cannot be OVERLAY; its size should be specified as 2^N, larger than 4KB, and should align with its start address
    EXTSRAM_DSP_TX 0x083fc000 0x2000
    {
         *.obj (EXTRAM_TXDATA)
    }
    EXTSRAM_DSP_RX 0x083fe000 0x2000
    {
         *.obj (EXTRAM_RXDATA)
    }
    EMIINIT_CODE 0x40000000 OVERLAY
    {
    	   * (EMIINITCODE, EMIINITCONST, EMIINITZI)
    }
    INTSRAM_CODE 0x40000000 OVERLAY 0x6A70
    {
         * (INTSRAM_ROCODE)
         switch8.o (+RO-CODE)
; system-realted CODE , SMALL set
         bootarm.obj (INTERNCODE)
         data_buff_pool.obj (INTERNCODE)
         ctrl_buff_pool.obj (INTERNCODE)
         stack_buff_pool.obj (INTERNCODE)
         stack_ltlcom.obj (INTERNCODE)
         stack_timer.obj (INTERNCODE)
         SST_intrCtrl.obj (INTERNCODE, INTERNCONST)
         cache.obj (INTERNCODE)
; Nucleus-related CODE , SMALL set
         tct.obj (INTERNCODE)
         tcc.obj (INTERNCODE)
         csc.obj (INTERNCODE)
         tmt.obj (+RO)
         smc.obj (INTERNCODE)
         evc.obj (INTERNCODE)
         pmc.obj (INTERNCODE)
         quc.obj (INTERNCODE)
         kal_nucleus_buff_mgr.obj (INTERNCODE)
         kal_nucleus_evshed_buff_mgr.obj (INTERNCODE)
         kal_nucleus_itc.obj (INTERNCODE)
         kal_nucleus_timer.obj (INTERNCODE)
; THREADX-related CODE , SMALL set
         ; UNDER CONSTRUCTION
         tx_thread_interrupt_disable.obj (+RO)
         tx_thread_interrupt_restore.obj (+RO)
         tx_thread_context_save.obj (+RO)
         tx_thread_context_restore.obj (+RO)
         tx_thread_irq_nesting_start.obj (+RO)
         tx_thread_irq_nesting_end.obj (+RO)
         tx_thread_system_return.obj (+RO)
         tx_thread_schedule.obj (+RO)
         tx_thread_resume.obj (+RO)
         tx_thread_system_resume.obj (+RO)
         tx_timer_interrupt.obj (+RO)
         tx_timer_thread_entry.obj (+RO)
         tx_block_allocate.obj (+RO)
         tx_block_release.obj (+RO)
         tx_event_flags_get.obj (+RO)
         tx_event_flags_set.obj (+RO)
         tx_mutex_get.obj (+RO)
         tx_mutex_put.obj (+RO)
         kal_threadx_tasks.obj (INTERNCODE)
         kal_threadx_buff_mgr.obj (INTERNCODE)
         kal_threadx_itc.obj (INTERNCODE)
         kal_threadx_timer.obj (INTERNCODE)
; common used C library
         memset.o (+RO)
         rt_memclr.o (+RO)
         callvia.o (+RO)
         _sprintf.o (+RO)
         rt_memcpy.o (+RO)
         lludiv10.o (+RO)
         rt_udiv.o (+RO)
         uread4.o (+RO)
         uwrite4.o (+RO)
; INTSRAM_CODE_OBJ_others_6253
         m11303.obj (INTERNCODE)
         cam_module.obj (INTERNCODE)
         uart.obj (INTERNCODE)
         gdi_image_direct_gif.obj (INTERNCODE)
         gdi_mutex.obj (INTERNCODE)
         gpt.obj (INTERNCODE)
         * (SNORCODE_INT)
         * (SNORCONST_INT)
; For __MIIPTS_LOADER__ start
         * (MIIPTS_INTERNCODE)
; For __MIIPTS_LOADER__ end  
; Please Do Not Remove
         m12100.obj (INTERNCODE)
         m12110.obj (INTERNCODE)
         m12120.obj (INTERNCODE)
         m12160.obj (INTERNCODE)
         m12170.obj (INTERNCODE)
         m12171.obj (INTERNCODE)
         m12180.obj (INTERNCODE)
    }
    INTSRAM_DATA 0x40006A70 0x6200
    {
         * (INTSRAM_RODATA, INTSRAM_RW, INTSRAM_ZI)
; system-realted data
         bootarm.obj (STACK_POOL_INTSRAM)
         stack_init.obj (INTERNCONST, INTERNRW, INTERNZI)
         ctrl_buff_pool.obj (INTERNCONST, INTERNRW, INTERNZI)
         stack_ltlcom.obj (INTERNCONST, INTERNRW, INTERNZI)
; Nucleus-related data ; Standard set
         tst*.obj (INTERNCONST, INTERNRW, INTERNZI)
         tct.obj (+RW, +ZI)
         tcd.obj (INTERNCONST, INTERNRW, INTERNZI)
         tmd.obj (+RW, +ZI)
         evd.obj (+RW, +ZI)
         pmd.obj (+RW, +ZI)
         qud.obj (+RW, +ZI)
         smd.obj (+RW, +ZI)
; THREADX-related data ; Standard set
         tx_thread_initialize.obj (+RW, +ZI)
         tx_timer_initialize.obj (+RW, +ZI)
; INTSRAM_DATA_OBJ_others_6253
         gdi_image.obj (INTERNCONST, INTERNRW, INTERNZI)
         gdi.obj (INTERNZI)
         interpret.obj (INTERNZI)
         sw_jpeg_decoder.obj (INTERNRW1, INTERNZI1)
         jpeg_encoder.obj (INTERNRW, INTERNZI)
         drv_gfx_stack_switch_manager.obj (INTERNRW2, INTERNZI2)
; For __MIIPTS_LOADER__ start
         * (MIIPTS_INTERNZI)
; For __MIIPTS_LOADER__ end 
; Please Do Not Remove
         m12100.obj (INTERNCONST, INTERNRW, INTERNZI)
         m12160.obj (INTERNCONST, INTERNRW, INTERNZI)
         m12170.obj (INTERNCONST, INTERNRW, INTERNZI)
         m12171.obj (INTERNCONST, INTERNRW, INTERNZI)
    }   

; Because MT6253 Internal RAM is tight, and med_main.obj and MP4DEC2 will not be used at simultaneously,
; on MT6253 platforms, the buffer in med_main.obj will be shared between JPEG and MP4DEC2.
; (Originally MP4DEC2 uses the DCM region shared with audio.)
; The sharing is used to make concurrency for audio and MP4DEC2
    MED_MAIN_REGION 0x4000CC70 OVERLAY 0x9600
    {
         med_main.obj (INTERNRW1, INTERNZI1)
         btmt_mem.obj (INTSRAM_RW, INTSRAM_ZI)
    }
    DYNAMIC_CODE12 0x4000cc70 OVERLAY 0x9600
    {
         * (MP4DEC2_DYNAMIC_ZI, MP4DEC2_DYNAMIC_RO)
    }
    DYNAMIC_CODE16 0x4000cc70 OVERLAY 0x9600
    {
         * (MP4ENC1_DYNAMIC_CODE, MP4ENC1_DYNAMIC_RO, MP4ENC1_DYNAMIC_ZI)
    }
    DYNAMIC_CODE20 0x4000cc70 OVERLAY 0x9600
    {
         * (264DEC3_DYNAMIC_CODE, 264DEC3_DYNAMIC_RO, 264DEC3_DYNAMIC_ZI)
    }
    DYNAMIC_CODE17 0x40016270 OVERLAY 0x0d90
    {
         * (264DEC1_DYNAMIC_CODE, 264DEC1_DYNAMIC_RO, 264DEC1_DYNAMIC_ZI)
    }
    DYNAMIC_CODE18 0x40016270 OVERLAY 0x0d90
    {
         * (MP4DEC_DYNAMIC_CODE, MP4DEC_DYNAMIC_RO)
    }
    DYNAMIC_CODE19 0x40016270 OVERLAY 0x0d90
    {
         * (MP4ENC_DYNAMIC_CODE, MP4ENC_DYNAMIC_RO)
    }
;============== __MMI_APPLE__  start =================== 
    DYNAMIC_CODE_SXMOBI 0x40016270 OVERLAY 0x0d90
    {
         *(SXMOBI_MP4_TCM_RW,SXMOBI_MP4_TCM_ZI)
    }       
;============== __MMI_APPLE__  end ===================    
    DYNAMIC_CODE1 0x40017000 OVERLAY 0x5000
    {
         * (AMR515_DYNAMIC_CODE, AMR515_DYNAMIC_ZI)
    }
    DYNAMIC_CODE11 0x40017000 OVERLAY 0x5000
    {
         * (VRENGINE_DYNAMIC_CODE, VRENGINE_DYNAMIC_ZI)
    }
    DYNAMIC_CODE13 0x40017000 OVERLAY 0x5000
    {
         * (MP4ENC2_DYNAMIC_ZI, MP4ENC2_DYNAMIC_RO)
    }
    DYNAMIC_CODE14 0x40017000 OVERLAY 0x5000
    {
         * (264DEC2_DYNAMIC_CODE, 264DEC2_DYNAMIC_RO, 264DEC2_DYNAMIC_ZI)
    }
    DYNAMIC_CODE3 0x40017000 OVERLAY 0x5000
    {
         * (CTM_DYNAMIC_CODE, CTM_DYNAMIC_ZI)
    }
    DYNAMIC_CODE4 0x40017000 OVERLAY 0x5000
    {
         * (G729_DYNAMIC_CODE, G729_DYNAMIC_ZI)
    }
    DYNAMIC_CODE5 0x40017000 OVERLAY 0x5000
    {
         * (SBC_DYNAMIC_CODE, SBC_DYNAMIC_ZI)
    }
    DYNAMIC_MIIPTS 0x40017000 OVERLAY 0x5000
    {
         * (MIIPTS_DYNAMIC_CODE, MIIPTS_DYNAMIC_ZI)
    }
    INTSRAM_MULTIMEDIA 0x4001C000  0x4000
    {
         display_intmem.obj  (INTERNRW1, INTERNZI1) 
    }
}
